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| hexfet ? power mosfet s d g v dss = 100v r ds(on) = 0.185 i d = 10a description surface mount (irlr120n) straight lead (irlu120n) advanced process technology fast switching fully avalanche rated lead-free ! " # $ %&' ( # ) * * " +!$,- # # " ./ 0 ! " $ 1"2 * " parameter max. units i d @ t c = 25c continuous drain current, v gs @ 10v 10 i d @ t c = 100c continuous drain current, v gs @ 10v 7.0 a i dm pulsed drain current 35 p d @t c = 25c power dissipation 48 w linear derating factor 0.32 w/c v gs gate-to-source voltage 16 v e as single pulse avalanche energy 85 mj i ar avalanche current 6.0 a e ar repetitive avalanche energy 4.8 mj dv/dt peak diode recovery dv/dt 5.0 v/ns t j operating junction and -55 to + 175 t stg storage temperature range soldering temperature, for 10 seconds 300 (1.6mm from case ) c absolute maximum ratings 1 " " 3415 ' + ( 6*7#3415 parameter typ. max. units r jc junction-to-case ??? 3.1 r ja junction-to-ambient (pcb mount) ** ??? 50 c/w r ja junction-to-ambient ??? 110 thermal resistance d-pak ' + + ' i-pak form quantity tube 75 irlr120npbf tape and reel 2000 irlr120ntrpbf tape and reel left 3000 irlr120ntrlpbf tape and reel right 3000 irlr120ntrrpbf eol notice # 289 irlu120npbf ipak tube 75 irlu120npbf note package type standard pack orderable part number base part number irlr120npbf d-pak 3 " " 3415 ' + ( 6*7#3415 parameter min. typ. max. units conditions v (br)dss drain-to-source breakdown voltage 100 ??? ??? v v gs = 0v, i d = 250 a v (br)dss / t j breakdown voltage temp. coefficient ??? 0.12 ??? v/c reference to 25c, i d = 1ma ??? ??? 0.185 v gs = 10v, i d = 6.0a ??? ??? 0.225 v gs = 5.0v, i d = 6.0a ??? ??? 0.265 v gs = 4.0v, i d = 5.0a v gs(th) gate threshold voltage 1.0 ??? 2.0 v v ds = v gs , i d = 250 a g fs forward transconductance 3.1 ??? ??? s v ds = 25v, i d = 6.0a ??? ??? 25 a v ds = 100v, v gs = 0v ??? ??? 250 v ds = 80v, v gs = 0v, t j = 150c gate-to-source forward leakage ??? ??? 100 na v gs = 16v gate-to-source reverse leakage ??? ??? -100 v gs = -16v q g total gate charge ??? ??? 20 i d = 6.0a q gs gate-to-source charge ??? ??? 4.6 nc v ds = 80v q gd gate-to-drain ("miller") charge ??? ??? 10 v gs = 5.0v, see fig. 6 and 13 t d(on) turn-on delay time ??? 4.0 ??? v dd = 50v t r rise time ??? 35 ??? ns i d = 6.0a t d(off) turn-off delay time ??? 23 ??? r g = 11 , v gs = 5.0v t f fall time ??? 22 ??? r d = 8.2 , see fig. 10 between lead, 6mm (0.25in.) from package and center of die contact c iss input capacitance ??? 440 ??? v gs = 0v c oss output capacitance ??? 97 ??? pf v ds = 25v c rss reverse transfer capacitance ??? 50 ??? ? = 1.0mhz, see fig. 5 electrical characteristics @ t j = 25c (unless otherwise specified) nh i gss s d g l s internal source inductance ??? 7.5 ??? r ds(on) static drain-to-source on-resistance l d internal drain inductance 888 4.5 888 i dss drain-to-source leakage current s d g parameter min. typ. max. units conditions i s continuous source current mosfet symbol (body diode) ??? ??? showing the i sm pulsed source current integral reverse (body diode) ??? ??? p-n junction diode. v sd diode forward voltage ??? ??? 1.3 v t j = 25c, i s = 6.0a, v gs = 0v t rr reverse recovery time ??? 110 160 ns t j = 25c, i f =6.0a q rr reverse recoverycharge ??? 410 620 nc di/dt = 100a/ s t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by l s +l d ) source-drain ratings and characteristics a 10 35 notes: v dd = 25v, starting t j = 25c, l = 4.7mh r g = 25 , i as = 6.0a. (see figure 12) repetitive rating; pulse width limited by max. junction temperature. ( see fig. 11 ) ** when mounted on 1" square pcb (fr-4 or g-10 material ) . for recommended footprint and soldering techniques refer to application note #an-994 i sd 6.0a, di/dt 340a/ s, v dd v (br)dss , t j 175c uses irl520n data and test conditions. this is applied for i-pak, l s of d-pak is measured between lead and center of die contact pulse width 300 s; duty cycle 2%. 9 " " 3415 ' + ( 6*7#3415 fig 3. typical transfer characteristics fig 4. normalized on-resistance vs. temperature fig 1. typical output characteristics fig 2. typical output characteristics 0.1 1 10 100 0.1 1 10 100 i , drain-to-source current (a) d v , drain-to-source voltage (v) ds a 20 s pulse width t = 25c j vgs top 15v 12v 10v 8.0v 6.0v 4.0v 3.0v bottom 2.5v 2.5v 0.1 1 10 100 0.1 1 10 100 i , drain-to-source current (a) d v , drain-to-source voltage (v) ds a 20 s pulse width t = 175c vgs top 15v 12v 10v 8.0v 6.0v 4.0v 3.0v bottom 2.5v 2.5v j 0.1 1 10 100 246810 t = 25c j gs v , gate-to-source voltage (v) d i , drain-to-source current (a) t = 175c j a v = 50v 20 s pulse width ds 0.0 0.5 1.0 1.5 2.0 2.5 3.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 j t , junction temperature (c) r , drain-to-source on resistance ds(on) (normalized) v = 10v gs a i = 10a d 5 " " 3415 ' + ( 6*7#3415 fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 0 200 400 600 800 1 10 100 c, capacitance (pf) ds v , drain-to-source voltage (v) a v = 0v, f = 1mhz c = c + c , c shorted c = c c = c + c gs iss gs gd ds rss gd oss ds gd c iss c oss c rss 0 3 6 9 12 15 0 5 10 15 20 25 q , total gate charge (nc) g v , gate-to-source voltage (v) gs v = 80v v = 50v v = 20v a for test circuit see figure 13 i = 6.0a d ds ds ds 0.1 1 10 100 0.4 0.6 0.8 1.0 1.2 1.4 t = 25c j v = 0v gs v , source-to-drain voltage (v) i , reverse drain current (a) sd sd a t = 175c j 0.1 1 10 100 1 10 100 1000 v , drain-to-source voltage (v) ds i , drain current (a) operation in this area limited by r d ds(on) 10 s 100 s 1ms 10ms a t = 25c t = 175c single pulse c j 2 " " 3415 ' + ( 6*7#3415 fig 9. maximum drain current vs. case temperature fig 10a. switching time test circuit v ds 90% 10% v gs t d(on) t r t d(off) t f fig 10b. switching time waveforms : 1 0.1 % : +"/"" 2"4: + - : fig 11. maximum effective transient thermal impedance, junction-to-case 0 2 4 6 8 10 25 50 75 100 125 150 175 c i , drain current (amps) d t , case temperature (c) a 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response) ; " " 3415 ' + ( 6*7#3415 q g q gs q gd v g charge fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current d.u.t. v ds i d i g 3ma v gs .3 f 50k .2 f 12v current regulator same type as d.u.t. current sampling resistors + - fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 t p d.u.t l v ds + - v dd driver a 15v 10v 0 40 80 120 160 200 25 50 75 100 125 150 175 j e , single pulse avalanche energy (mj) as a starting t , junction temperature (c) i top 2.4a 4.2a bottom 6.0a d < " " 3415 ' + ( 6*7#3415 p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - fig 14. for n-channel hexfets * v gs = 5v for logic level devices peak diode recovery dv/dt test circuit r g v dd ? dv/dt controlled by r g ? driver same type as d.u.t. ? i sd controlled by duty factor "d" ? d.u.t. - device under test d.u.t circuit layout considerations ? low stray inductance ? ground plane ? low leakage inductance current transformer = " " 3415 ' + ( 6*7#3415 note: for the most current drawing please refer to ir website at http://www.irf.com/package/ international as sembled on ww 16, 2001 in t he as sembly line "a" or note: "p" in ass embly line pos ition example: lot code 1234 t his is an irfr120 wi t h as s e mb l y i ndicates "l ead-f ree" product (optional) p = designates lead-free a = as s e mb l y s i t e code part number we e k 16 dat e code year 1 = 2001 rect ifier internat ional logo lot code as s e mb l y 34 12 irf r120 116a line a 34 rect ifier logo irf r120 12 as s e mb l y lot code year 1 = 2001 dat e code part number we e k 16 "p" in as s embly line pos ition indicates "l ead-f ree" quali fication to the cons umer -level p = designates lead-free product qualified to the cons ume r l eve l (opt ional) 7 " " 3415 ' + ( 6*7#3415 78 line a logo int e rnat ional re ct if ie r or product (optional) p = designates lead-free a = assembly site code irf u120 part number week 19 dat e code ye ar 1 = 2001 rectifier int e rnat ional logo assembly lot code irfu120 56 dat e code part number lot code assembly 56 78 ye ar 1 = 2001 week 19 119a indicates l ead-f ree" as s e mble d on ww 19, 2001 in the assembly line "a" note: "p" in as s embly line pos ition example: with assembly t his is an irf u120 lot code 5678 note: for the most current drawing please refer to ir website at http://www.irf.com/package/ 14 " " 3415 ' + ( 6*7#3415 tr 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) 12.1 ( .476 ) 11.9 ( .469 ) feed direction feed direction 16.3 ( .641 ) 15.7 ( .619 ) trr trl notes : 1. controlling dimension : millimeter. 2. all dimensions are shown in millimeters ( inches ). 3. outline conforms to eia-481 & eia-541. notes : 1. outline conforms to eia-481. 16 mm 13 inch note: for the most current drawing please refer to ir website at http://www.irf.com/package/ 11 " " 3415 ' + ( 6*7#3415 ? qualification standards can be found at international rectifier?s web site: http://www.irf.com/product-info/reliability ?? applicable version of jedec standard at the time of product release ir world headquarters: 101 n. sepulveda blvd., el segundo, california 90245, usa to contact international rectifier, please visit http://www.irf.com/whoto-call/ moisture sensitivity level d-pak i-pak rohs c ompliant yes qualification information ? qualification level industrial (per jedec jesd47f ?? guidelines) ms l 1 revision history date comment ? updated electrical parameter table typo on rdson units from "w" to " " on page2. ? updated package outline on page 8 & page 9. ? added orderable table on page1. ? updated datasheet with ir corporate template. ? updated ordering information to reflect the end-of-life (eol notice #289) ? added qualification table on page10. 7/9/2014 |
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